BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 55

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.5
3.5.1
Clock Controller
a.
b.
c.
following features:
The clock controller is a circuit that controls the clock for the overall MCU. It has the
Transition of clock operation modes is as follows:
HALT mode
Note1: About PCM mode, please refer to chapter 26 (Power Management Circuit).
(CPU stop)
By using a clock multiplication circuit (PLL), the clock controller supplies a clock of up to
200 MHz to the CPU. As a multiplied figure, x1, x6, or x8 can be dynamically selected.
The clock gear contributes to reduction of the consumption current.
Writing to registers inside the clock controller is prohibited.
Overview
Interrupt
Instruction
Interrupt
Figure 3.5.1 Clock mode status transition
Reset ON
Instruction
TENTATIVE
((6 or 8)×f
TMPA900CM- 54
(f
PLL-OFF mode
OSCH
PLL-ON mode
(f
/gear value)
OSCH
Reset
OSCH
Instruction
/gear value)
/1)
Cancel the
reset status
Instruction
Cancel (interrutp) request
(only some power is ON)
PCM status
Note1
TMPA900CM
2009-10-14