BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 328

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6. NDECCRD0 (NAND-Flash ECC Read Register 0)
7. NDECCRD1 (NAND-Flash ECC Read Register 1)
8. NDECCRD2 (NAND-Flash ECC Read Register 2)
[31:0]
[31:0]
[31:16]
[15:0]
[Description]
Bit
Bit
Bit
Note: Before reading ECC from the NAND Flash ECC register, be sure to set NDFMCR0<ECCE> to 0. The ECC in
a. <CODE0[31:0]>, <CODE1[31:0]>, <CODE2[15:0]>
register (when the value of NDFMCR0<ECCE> changes from 1 to 0 the ECC in this
register is updated).
and the Reed-Solomon ECC calculation generates 80 bits of ECC for every 1 byte to 512
bytes of valid data.
This register is used to read the ECC calculated in this circuit.
When 0 is written to NDFMCR0<ECCE> after read/write ends, ECC is prepared in this
The Hamming ECC calculation generates 22 bits of ECC for every 256 bytes of valid data
Three 32-bit width registers are provided to store 80 bits.
The table below shows the format for storing ECC.
the NAND Flash ECC register is updated when NDFMCR0<ECCE> changes from 1 to 0. Also note that when
the ECC in the ECC generator is reset by NDFMCR0<ECCRST>, the contents of this register are not reset.
CODE0[31:0]
CODE1[31:0]
−
CODE2[15:0]
Symbol
Symbol
Symbol
Bit
Bit
Bit
RO
RO
−
RO
Type
Type
Type
0x00000000
0x00000000
TENTATIVE
Undefined
0x0000
TMPA900CM- 327
Reset
Value
Reset
Reset
Value
Value
Read undefined.
Register to store ECC
Register to store ECC
Register to store ECC
Description
Description
Description
Address = (0xF201_0000) + (0x0020)
Address = (0xF201_0000) + (0x0024)
Address = (0xF201_0000) + (0x0028)
TMPA900CM
2009-10-14