BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 468
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 468 of 959
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Watermark level
SSP0DMACR.
FIFO, the receive DMA request is asserted.
the FIFO), the transmit DMA request is asserted.
request clear signals, which are asserted by the DMA controller, is provided.
After the request clear signal is deasserted, a request signal can become active again,
depending on the conditions described above. All request signals are deasserted if the SSP
is disabled or the DMA enable signal is cleared.
receive FIFOs.
(5) DMA interface
The DMA operation of the SSP is controlled through the DMA control register,
When there are more data than the watermark level (half of the FIFO) in the receive
When the amount of data left in the receive FIFO is less than the watermark level (half of
To clear the transmit/receive DMA request, an input pin for the transmit/receive DMA
Set the DMA burst length to 4 words.
* For the remaining three characters, the SSP does not assert the burst request.
Each request signal remains asserted until the relevant DMA clear signal is asserted.
The following table shows the trigger points for DMABREQ, for both the transmit and
1/2
(number of empty locations)
Transmit
TENTATIVE
TMPA900CM- 467
4
Burst length
(number of filled locations)
Receive
4
TMPA900CM
2009-10-14
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