BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 697
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Number of colors displayable
simultaneously
Number of available horizontal lines
Number of available vertical lines
Data bus width of transfer destination
Input data
Data type
(LCD driver)
3.19.4
and 8-bit LD data buses are supported.
feature.
To support STN 64-level grayscale mode, VRAM uses the following format. And the external 4-bit
Dummy area
The LCD controller contained in this LSI supports 64-level grayscale LCD display as an optional
Type of LCD panel
D31-D24
LD[7:0] / LD[3:0] pins
LCLAC pin
LCLLP pin
LCLFP pin
LCLCP pin
LCLLE pin
LCD Controller Option Function (LCDCOP)
D23-D18
4
th
pixel
Table 3.19.8 LCDC Optional Feature
64-level grayscale
Max : 640
Max : 480
4/8 bits
LCDC output data in TFT 24-bit mode
Little-endian supported
Data bus dedicated to the LCD driver
AC bias signal (frame signal)
Horizontal sync pulse
Vertical sync pulse
Clock for LCDD data latch (panel clock)
Not used basically
TENTATIVE
TMPA900CM- 696
D17-D12
3
rd
pixel
STN (Dual/Single)
2
D11-D6
nd
pixel
1
D5-D0
st
TMPA900CM
pixel
2009-10-14
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