BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 515
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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• Note:
abtpri_r0 bits. If the same priority values are set, you will not be able to set 1 to abt_en.
<Relationship of DMAC and the priority area of the Arbiter Setting register>
and one DMAC for Master Read (DMAC_R0). The second DMAC for Master Write
(DMAC_W1) and the second DMAC for Master Read (DMAC_R1) are not supported.
Accordingly, setting priority for DMAC_W1 and DMAC_R1 has virtually no meaning,
but you should be sure to set different priority values for the abtpri_w1, abtpri_w0,
abtpri_r1, and abtpri_r0 bits as mentioned above. There will be no problem to set
values for the corresponding register areas of an unpackaged DMAC. The priority
areas of Arbiter Setting register correspond with DMAC as shown below.
Be sure to set different priority values for the abtpri_w1, abtpri_w0, abtpri_r1, and
Current UDC2AB specification supports one DMAC for Master Write (DMAC_W0)
Figure 3.16.6 Relationship between DMAC and priority areas
Priority of Arbiter Setting register
DMAC_W0
abtpri_w0
EP1
TENTATIVE
AHB Master Logical Block
DMAC_W1
TMPA900CM- 514
abtpri_w1
EPx
AHB Master
DMAC_R0
abtpri_r0
EP2
DMAC_R1
abtpri_r1
EPy
TMPA900CM
2009-10-14
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