BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 910

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.27.8
1.
2.
3.
4.
<Conditions>
should not be linked.
Restrictions on the USB Host Controller
For an isochronous transfer, a frame number to be transferred is defined in an Isochronous
Transfer Descriptor (ITD). However, when frame numbers are not synchronized between
the Host and software, and if the descriptor to be executed with a previous frame is
scheduled later, the host determines that a time error has occurred and writes back
DATAOVERRUN to the CC field of the ITD. However, if the following conditions are met,
the host will write back inappropriate status (NOERROR).
For a low-speed IN transfer by the host, the USB 2.0 Specification defines the inter-packet
delay (the time from when the Host receives a data packet to when the host transfers a
handshake packet) as less than 7.5 bit times. In this product, however, the inter-packet
delay is about 9.2 bit times in the worst case.
If a fatal error occurs on the USB system and the host detects this error (e.g., Master Abort,
Target Abort, etc. on the PCI bus), the OHCI core sets the UnrecoverableError (UE) bit in
the HcInterruptStatus register.
At this time, if the Unrecoverable Error (UE) bit is set and the UE bit in the
HcInterruptEnable register is set, a hardware interrupt is generated.
After this interrupt is detected, a software reset (HcCommandStatus.HCR = 1’b1) is
required to recover from the UE state, and the host then moves to the SUSPEND state.
After the software reset, OHCI registers are initialized. If a remote wake-up occurs on the
device, the host remains in the SUSPEND state.
When the remote wake-up function is to be used, a program for recovering from the
SUSPEND state must be implemented.
When HcRhDescriptorA.NPS[9] is set to 1’b1 when an overcurrent is occurred,
PortResetStatus.PRS[4] and PortSuspendStatus.PSS[2] of the HcRhPortStatus register is
not
HcRhDescriptorB.DR[PortNo] = 1’b1.
Programming examples:
The above problem occurs if both the following two conditions are met:
1. ITD.FC[2:0] = R[2:0]
2. ITD.FC[2:0] < R[15:0]
where ITD.FC indicates the number of times an ITD is executed, and
R = HcFmNumber (current frame number) – ITD.SF (transfer start frame number).
Make sure that each ITD is synchronized to the current frame number. If not, this ITD
1)
2)
cleared.
After initializing OHCI registers by a software reset, set a value other than
USBSUSPEND (2’b11) to the HcControl.HCFS field.
When a remote wake-up is detected, the HcInterruptStatus.RD bit is set to 1’b1.
After detecting this interrupt, set a value other than USBSUSPEND (2’b11) to
the HcControl.HCFS field.
Therefore,
TENTATIVE
TMPA900CM- 909
do
not
set
HcRhDescriptorA.NPS[9]
=
TMPA900CM
2009-10-14
1'b1
and