BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 257
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 257 of 959
- Download datasheet (5Mb)
DMAC1 (AHB4) bus request
DMAC2 (AHB5) bus request
(Bus request from the bus matrix
CPU Data (AHB1) bus request
CPU Inst (AHB0) bus request
LCDC (AHB2) bus request
output of LCDDA2, USB)
AHB3 bus request
(a) Bus matrix
Priority of handling :① → ② → ③ → ④→⑤→⑥→⑦
1. Bus matrix of AHB0, AHB1, AHB2, AHB3, AHB4 and AHB5 supports
Round-Robin arbitration scheme.
The following diagram shows the priority of bus requests.
①
③
⑥
②
④
⑤
TENTATIVE
AHB0
handling
A dotted line is the point of handling end where bus is released.
TMPA900CM- 256
AHB1
handling
AHB2
handling
⑦
AHB3
handling
AHB4
handling
AHB5
handling
AHB0
handling
TMPA900CM
2009-10-14
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