BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 270

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

[31:23]
[22:21]
[20:18]
[17:15]
[14]
[13]
[12:7]
[6]
[5:3]
[2:0]
[Description]
Bit
a. <memory_burst>
4.
Set the burst length of the memory access controller.
This needs to correspond with the burst length of the memory configured in the
dmc_direct_cmd_5 register.
dmc_memory_cfg_5 (DMC Memory Configuration Register)
−
−
memory_burst
auto_power_down
ap_bit
row_bits
active_chips
stop_mem_clock
power_down_prd
column_bits
Symbol
Bit
R/W
R/W
−
−
R/W
R/W
R/W
R/W
R/W
R/W
Type
TENTATIVE
TMPA900CM- 269
Undefined
0y00
Undefined
0y010
0y0
0y0
0y000000
0y0
0y100
0y000
Reset
Value
Read undefined. Write as zero.
Always write 0y00
Read undefined. Write as zero.
Set the read and write burst length for the SDRAM
0y000 = Reserved
0y001 = Burst 2
0y010 = Burst 4
0y011 = Burst 8
0y100 = Burst 16
other = Reserved
memory clock stop:
0y1 = Enable
0y0 = Disable
SDRAM auto Powerdown Enable:
0y1 = Enable
0y0 = Disable
Number of SDRAM automatic Powerdown memory clocks:
(Min. value = 1)
0y000001 ∼ 0y111111
The position of the auto-precharge bit in the memory
address:
0y0 = address bit 10
0y1 = address bit 8
The number of row address bits:
0y000 = 11 bits
0y001 = 12 bits
0y010 = 13 bits
0y011 = 14 bits
0y100 = 15 bits
0y101 = 16 bits
other = Reserved
The number of column address bits:
0y000 = 8 bits
0y001 = 9 bits
0y010 = 10 bits
0y011 = 11 bits
0y100 = 12 bits
other = Reserved
Description
Address = (0xF431_0000) + (0x000C)
TMPA900CM
2009-10-14