BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 908
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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[31]
[30]
[29]
[28:2]
[1:0]
bit Symbol
Read/Write
Reset state
bit Symbol
Read/Write
Reset state
2.7.
Bit
Note: When the over current input enable bit is not set, the USBOCn pin must be used as output port.
23. HcBCR0 Register
core and the SUSPEND state of the USB transceiver. To enter Power Cut Mode with the
USB transceiver in the SUSPEND state, write a 1 to the TRANS_SUSP bit.
The HcBCR0 register controls clock supply from the USB bridge logic to the USB host
−
TRNS_SUSP
OVCE
−
−
Mnemonic
erve
Res
31
15
R
d
0
TRNS
SUSP
R/W
30
14
1
OVC
R/W
Reserved
Transceiver
Suspend
USB Host
Over Current
Input Enable
Reserved
Reserved
29
13
E
0
Field name
28
12
TENTATIVE
27
11
TMPA900CM- 907
26
10
This bit controls the SUSPEND state of the USB transceiver.
To enter STOP mode or power cut mode with the USB transceiver in
the SUSPEND state, set this bit to 1.
0: - (Controlled by the USB Host Controller)
1: Suspend
USB Host Over Current input Enable
0y0: Enable
0y1: Disable
Write as zero
25
Reserved
9
R
0
24
8
23
7
Reserved
22
6
R
0
Address = (0xF450_0000) + (0x0080)
Function
21
5
20
4
19
3
18
2
TMPA900CM
2009-10-14
erve
R/W
Res
17
1
d
0
erve
R/W
Res
16
0
d
0
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