BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 528
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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b. <mrbfemp>
c.
d. <mrepdset>
e. <mwepdset>
Indicates whether or not the buffer for the Master Read DMA in UDC2AB is empty.
0y0: Indicates the buffer for the Master Read DMA contains some data.
0y1: Indicates the buffer for the Master Read DMA is empty.
<mwbfemp>
Indicates whether or not the buffer for the Master Write DMA in UDC2AB is empty.
0y0: Indicates the buffer for the Master Write DMA contains some data.
0y1: Indicates the buffer for the Master Write DMA is empty.
This bit will be set to 1 when the data to be transmitted is set to the Tx-EP of UDC2 by
Master Read DMA transfer, making no room to write in the endpoint. It will turn to 0
when the data is transferred from UDC2 by the IN-Token from the host. While this bit is
set to 0, DMA transfers to the endpoint can be made. (This bit is the eptx_dataset input
signal with CLK_H synchronization.)
0y0: Data can be transferred into the endpoint.
0y1: There is no space to transfer data in the endpoint.
This bit will be set to 1 when the data received is set to the Rx-EP of UDC2. It will turn to
0 when the entire data was read by the DMA for Master Write. (This bit is the
eprx_dataset input signal with CLK_H synchronization.)
0y0: No data exists in the endpoint.
0y1: There is some data to be read in the endpoint.
TENTATIVE
TMPA900CM- 527
TMPA900CM
2009-10-14
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