BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 704

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Address
n+4k
n+8k
n+12k
n
(Data of SRC picture’s
into the dedicated DualPortRAM.
required. Therefore, the BC_Expander circuit can start generating interpolation data
at the point when four lines of original image data become available.
RAM and the 128-bit-width bus (PortB).
the AHB bus with the 32-bit-width bus (PortA).
which
Dummy+510+Dummy).
(For example, area 0 to area 3) become available. After that, every time one line of
data is added (area 4), four lines of data are prepared again (area 1 to area 4) to start
next calculation.
one line)
Area3
Area1
Area2
PortA
Area0
To use the scaler function, original image data (RGB) needs to have been written
As described earlier, to generate interpolation data, original pixels of 4 × 4 are
The BC_Expander circuit of the LCDDA is connected with the 16-K-byte Dual Port
This 16-K-byte Dual Port RAM, which can be used as a normal RAM, is connected to
In addition, this 16-K-byte Dual Port RAM is divided into 2-Kbyte × 8 areas in
The BC_Expander circuit can start calculation at the point when four lines of data
In this manner, the area is looped to perform calculation.
Figure 3.20.5 Connection with memory, and basic operation
Dual Port RAM (16KB)
one
Read/Write
connection
Normal
32-bit
line
of
TENTATIVE
TMPA900CM- 703
original
Area4
Area5
Area6
Area7
AHB Bus
picture
PortB
connection
data
128-bit
Read
Only
is
prepared.
Read/Write
connection
LCDDA
Normal
32-bit
(Max
TMPA900CM
2009-10-14
510
pixel: