BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 663
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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[31:16]
[15:0]
[Description]
a. <Left[15:0]>, <Right[15:0]>
Bit
Note1: this register is write-only.
Note2: this register can be accessed from CPU/DMAC as Master.
20. I2STDAT (Transmit FIFO Window DMA Target Register)
Stereo audio data is set simultaneously with upper data as left channel data and lower
data as right channel data. Data can be written to any address in a range of 0xF2041000
to 0xF2041FFF, and is sequentially stored in the FIFO as it is written. This register does
not support read operations (always returns 0).
Left[15:0]
Right[15:0]
Bit Symbol
TENTATIVE
TMPA900CM- 662
WO
WO
Type
0x0000
0x0000
Reset
Value
I2STx left audio data [15:0]
I2STx right audio data [15:0]
Address = (0xF204_1000) + (0x0000)
Description
TMPA900CM
2009-10-14
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