BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 395

KIT STARTER TMPA900 USB JTAG

BMSKTOPASA900(DCE)

Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Datasheets

Specifications of BMSKTOPASA900(DCE)

Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
21. UART1CR (UART1 control register)
22. UART2CR (UART2 control register)
[31:16]
[15]
[14:10]
[9]
[8]
[7]
[6:1]
[0]
[31:10]
[9]
[8]
[7]
[6:1]
[0]
[Description]
a. <CTSEN>
b. <RTSEN>
c.
Bit
Bit
When this bit is set to 1, CTS hardware flow control is enabled. Data is transmitted only
after the UxCTSn signal has been asserted.
When this bit is set to 1, RTS hardware flow control is enabled. Data is transmitted only
when there is an empty space in the receive FIFO.
<RTS>
This bit is the UART Request To Send (UxRTSn) modem status output signal. When this
bit is programmed to a 1, the output is 0.
CTSEN
RXE
TXE
Reserved
Reserved
UARTEN
RXE
TXE
Reserved
Reserved
UARTEN
Symbol
Symbol
Bit
Bit
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Type
Type
TENTATIVE
TMPA900CM- 394
Undefined
0y0
Undefined
0y1
0y1
0y0
Undefined
0y0
Undefined
0y1
0y1
0y0
Undefined
0y0
Reset
Reset
Value
Value
Read as undefined. Write as zero.
CTS hardware flow control enable
0y0: Disable
0y1: Enable
Read as undefined. Write as zero.
UART receive enable
0y0: Disable
0y1: Enable
UART transmit enable
0y0: Disable
0y1: Enable
Write as zero.
Read as undefined. Write as zero.
UART enable
0y0: Disable
0y1: Enable
Read as undefined. Write as zero.
UART receive enable
0y0: Disable
0y1: Enable
UART transmit enable
0y0: Disable
0y1: Enable
Write as zero.
Read as undefined. Write as zero.
UART enable
0y0: Disable
0y1: Enable
Address = (0xF200_1000) + (0x0030)
Address = (0xF200_4000) + (0x0030)
Description
Description
TMPA900CM
2009-10-14

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