BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 204

KIT STARTER TMPA900 USB JTAG

BMSKTOPASA900(DCE)

Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Datasheets

Specifications of BMSKTOPASA900(DCE)

Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
smc_timeout
two Access requests of DMC and SMC are generated, EBI keeps the one Accsess request wait,
when the other is accessing.
generated continuously, EBI manage the overlapped time, also it has a “Timeout counter”; the bus
is released forcibely.
priority of the DMC becomes..
register.
register are Low-order 8bits only. The most significant bit (bit 7) of effective bits controls
High-order 3bits of the 10 bit couter.
Register
Name
EBI shifts the bus according to the access request from memory controller (DMC and SMC). If
To avoid the one Access request is made to wait for a long time when one Access request is
In the TMPA900CM, the higher the access speed and the frequency become, the higher the
Therefore, it has function to prioritize DMC request by setting Timeout cycle of SMC side to
The smc_timeout cycle is controlled by a 10 bit counter, however, the effective bits in control
Note: “0x00000000” cannot be set. “0x00000001 to 0x000000FF” only is effective.
Note: To avoid an underflow in LCDC when setting DMC memory (SDRAM) to VRAM of LCDC,It is recommended to
SMC timeout cycle setting register
smc_timeout register
set this register to 0y01.Please use this function together with the QOS function (refer to “DMC“ section)
bit31 to bit8
DMC time out cycle
0x0050
1024 clocks (Fixed)
Address
(base+)
bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
Table 3.10.2 Timeout for EBI
Type
R/W
TENTATIVE
TMPA900CM- 203
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
Reset value
0x000000FF
TIMEOUT Counter
to 1024 clocks (configurable with register)
SMC Timeout Register
SMC time out cycle
Description
Base address = 0xF00A_0000
TMPA900CM
2009-10-14

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