BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 432
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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[31:8]
[7]
[6]
[5]
[4]
[3]
[2]
[1:0]
[Description]
a. <MST>
b. <TRX>
c. <BB>
Bit
Note: Refer to Section 3.14.6.3 “Serial CLock”.
Note: Refer to Section 3.14.6.3 “Serial Clock”.
Note: Refer to Section 3.14.6.3 “Serial Clock”.
4.
This bit selects master or slave mode.
0y0: Slave
0y1: Master
This bit selects transmission or reception mode.
0y0: Reception
0y1: Transmssion
This bit is used to generate a start or stop condition.
0y0: Generate a stop condition.
0y1: Generate a start condition.
I2C0CR2 (I
−
MST
TRX
BB
PIN
I2CM
−
SWRES[1:0]
Bit Symbol
2
C0 Control Register 2) (Write Only)
−
WO
WO
WO
WO
WO
−
WO
Type
TENTATIVE
TMPA900CM- 431
Undefined
0y0
0y0
0y0
0y1
0y0
Undefined
0y00
Reset
Value
Read as undefined. Write as zero.
Selects master or slave mode.
0y0: Slave
0y1: Master
Selects transmit or receive operation.
0y0: Receiver
0y1: Transmitter
Selects whether to generate a start or stop
condition.
0y0: Generate a stop condition.
0y1: Generate a start condition.
Service request clear
0y0: No effect
0y1: Clear service request
I
0y0: Disable
0y1: Enable
Read as undefined. Write as zero.
Software reset
A software reset is generated by writing 0y10
and then 0y01 to these bits.
2
C operation control
Address = (0xF007_0000) + (0x000C)
Description
TMPA900CM
2009-10-14
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