BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 887

KIT STARTER TMPA900 USB JTAG

BMSKTOPASA900(DCE)

Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Datasheets

Specifications of BMSKTOPASA900(DCE)

Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Read/Write
(HCD)
Read/Write
(HC)
Read/Write
(HCD)
Read/Write
(HC)
bit Symbol
Reset state
bit Symbol
Reset state
[31:8]
[7:0]
Bit
7.
Communication Area. The Host Controller Driver determines the alignment restrictions by
writing all ones to HcHCCA and reading the content of HcHCCA. The alignment is
evaluated by examining the number of zeros in the lower order bits. The minimum
alignment is 256 bytes. Therefore, bits 0 through 7 always return 0 when read. This area is
used to hold the control structures and the Interrupt table that are accessed by both the
Host Controller and the Host Controller Driver.
The HcHCCA register contains the physical address of the Host Controller
HcHCCA Register
Mnemonic
HCCA
31
15
0
0
30
14
0
0
HostController
Communication
Area
Reserved
29
13
0
0
Field name
28
12
0
0
HCCA
R/W
R
TENTATIVE
27
11
TMPA900CM- 886
0
0
26
10
0
0
This is the base address of the Host Controller Communication Area.
25
9
0
0
24
8
0
0
HCCA
R/W
R
23
7
0
22
6
0
Address = (0xF450_0000) + (0x0018)
Function
21
5
0
20
Reserved
4
0
19
3
0
18
2
0
TMPA900CM
2009-10-14
17
1
0
16
0
0

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