BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 477
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 477 of 959
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12. SSP1IMSC (SSP1 Interrupt mask set and clear register)
[31:4]
[3]
[2]
[1]
[0]
[Description]
a. <TXIM>
b. <RXIM>
c.
d. <RORIM>
Bit
<RTIM>
Enables or disables interrupts that are generated when TxFIFO is half empty or less.
Enables or disables interrupts that are generated when RxFIFO is half full or less.
Enables or disables interrupts that are generated when the data in RxFIFO is not read
out before the timeout period expires.
Enables or disables interrupts that are generated when data is written to RxFIFO while
it is full.
−
TXIM
RXIM
RTIM
RORIM
Symbol
Bit
−
R/W
R/W
R/W
R/W
Type
TENTATIVE
TMPA900CM- 476
Undefined
0y0
0y0
0y0
0y0
Reset
Value
Read as undefined. Write as zero.
Transmit FIFO interrupt enable:
0y0: Disable
0y1: Enable
Receive FIFO interrupt enable:
0y0: Disable
0y1: Enable
Receive timeout interrupt enable:
0y0: Disable
0y1: Enable
Receive overrun interrupt enable:
0y0: Disable
0y1: Enable
Address = (0xF200_3000) + (0x0014)
Description
TMPA900CM
2009-10-14
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