BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 237
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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[31:17]
[16]
[15:8]
[7:0]
[Description]
Bit
a. <brc_n_rbc>
b. <address_match>
c.
Note: When you set the start address, refer to the section 3.3 Memory Map, and confirm valid areas.
21. dmc_chip_0_cfg_3 (DMC chip_0_cfg Registers)
SDRAM address structure:
0y0 = row, bank, column
0y1 = bank, row, column
Set the start address [31:24].
Do not access DMC area (Not used) except for configured CS area, if you accessed to
memory less than 512 MB.
Set the CS areas.
Determine which bit in the start address should be or should not be compared.
0y0 = Not compare
0y1 = Compare
<address_mask>
−
brc_n_rbc
address_match
address_mask
Symbol
Bit
−
R/W
R/W
R/W
Type
TENTATIVE
TMPA900CM- 236
Undefined
0y0
0xFF
0x00
Reset
Value
Read as undefined. Write as zero.
SDRAM address structure:
0y0 = row, bank, column
0y1 = bank, row, column
Set the start address [31:24]:
0x00 to 0xFF
Set the mask value of the start address [31:24]:
The bit for the value 1 is a bit for address comparison
0x00 to 0xFF
Address = (0xF430_0000) + (0x0200)
Description
TMPA900CM
2009-10-14
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