BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 461
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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3.15.3
Note: When using the SPI slave mode without using the FSS pin, be sure to write 1 byte or more of data into the
• Serial clock (SP0CLK)
SSP is idle. For SPI frame format, the serial clock (SP0CLK) is held inactive while the SSP
is idle. SP0CLK is output at the specified bit rate only while data is being transmitted.
(1) Configuring the SSP
(2) Enabling the SSP
(3) Clock ratios
(4) Frame format
SPP Operation
been written into the transmit FIFO or when transmit data is written into the transmit
FIFO after SSP operation has been enabled.
programmed, and is transmitted starting with the MSB.
in the control register SSP0CR1. The communication rate need also be set by
programming the prescale register SSP0CPSR and SSP0CR0<SCR>.
the transmit interrupt will be generated. It is possible to use this interrupt to write the
initial transmit data.
The PCLK frequency setting must satisfy the following conditions:
[Master mode]
For SSI and Microwire frame formats, the serial clock (SP0CLK) is held Low while the
[Slave mode]
This SSP supports the following frame formats:
The SSP communication protocol must be configured while the SSP is disabled.
Set the frame format in the control register SSP0CR0, and select master or slave mode
Transmission of data begins when SSP operation is enabled after transmit data has
However, if the transmit FIFO has four entries or less when SSP operation is enabled,
Each frame format is between 4 to 16 bits long depending on the size of data
• SPI
• SSI
• Microwire
transmit FIFO before enabling SSP operation. If SSP operation is enabled while the transmit FIFO is empty,
transfer data cannot be output properly.
f
f
f
f
SP0CLK
SP0CLK
SP0CLK
SP0CLK
(max): f
(min): f
(max): f
(min): f
PCLK
PCLK
PCLK
PCLK
/ (254 × 256)
/ (254 × 256)
/ 2
/ 12
TENTATIVE
TMPA900CM- 460
TMPA900CM
2009-10-14
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