BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 411
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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37. UART2ICR (UART2 Interrupt clear register)
[31:11]
[10]
[9]
[8]
[7]
[6]
[5]
[4]
[3:0]
Bit
Note: The UART1ICR register is a write-only interrupt clear register. When a bit of this register is set to 1, the
associated interrupt is cleared. A write of 0 to any bit of this register is invalid.
−
OEIC
BEIC
PEIC
FEIC
RTIC
TXIC
RXIC
−
Symbol
Bit
−
WO
WO
WO
WO
WO
WO
WO
−
Type
TENTATIVE
TMPA900CM- 410
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Reset
Value
Read as undefined. Write as zero.
Overrun error interrupt clear
0y0: Invalid
0y1: Clear
Break error interrupt clear
0y0: Invalid
0y1: Clear
Parity error interrupt clear
0y0: Invalid
0y1: Clear
Framing error interrupt clear
0y0: Invalid
0y1: Clear
Receive timeout interrupt clear
0y0: Invalid
0y1: Clear
Transmit interrupt clear
0y0: Invalid
0y1: Clear
Receive interrupt clear
0y0: Invalid
0y1: Clear
Read as undefined. Write as zero.
Address = (0xF200_4000) + (0x0044)
Description
TMPA900CM
2009-10-14
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