BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 15

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SJ3
DMCCASn
DMCCASn
SJ4
DMCBA0
DMCBA0
SJ5
DMCBA1
DMCBA1
SJ6
DMCCKE
DMCCKE
−
SK0
DMCSDQM0
DMCDDM0
SK1
DMCSDQM1
DMCDDM1
SK2
DMCSDQM2
−
SK3
DMCSDQM3
−
SK4
SMCWEn
SL0
DMCSCLK
DMCDCLKP
SL1
−
DMCDCLKN
SL2
DMCAP
DMCAP
−
SL4
−
DMCDDQS0
SL5
−
DMCDDQS1
SL6
DMCCLKIN
−
Pin name
Note: Pin names "SA0 through SA7, …, and SU0 through SU4" are symbols used for convenience and are different
Number of
from general-purpose port functions "PA0 through PA3, …, and PV0 through PV7."
pins
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
−
Output
Output
−
Output
Output
−
Output
Output
−
Output
Output
−
Output
Output
−
Output
Output
−
Output
−
−
Output
−
−
Output
−
Output
Output
−
−
Output
−
Output
Output
−
−
Input/Output
−
−
Input/Output
−
Input
Input/Output
Table 2.2.1 Pin names and functions (2/8)
−
Column address strobe signal for SDR_SDRAM
Column address strobe signal for DDR_SDRAM
−
BANK0 strobe signal for SDR_SDRAM
BANK0 strobe signal for DDR_SDRAM
−
BANK1 strobe signal for SDR_SDRAM
BANK1 address strobe signal for DDR_SDRAM
−
Clock-enable signal for SDR_SDRAM
Clock-enable signal for DDR_SDRAM
−
Byte enable signal (D0 to D7) for SDR_SDRAM
Data mask signal (D0 to D7) for DDR_SDRAM
−
Byte enable signal (D8 to D15) for SDR_SDRAM
Data mask signal (D8 to D15) for DDR_SDRAM
−
Byte enable signal (D16 to D23) for SDR_SDRAM
Not used
−
Byte enable signal (D24 to D31) for SDR_SDRAM
Not used
−
Write-enable signal for NORF/SRAM/MROM
−
Clock signal for SDR_SDRAM
Positive phase clock signal for DDR_SDRAM
−
Not used
Negative phase clock signal for DDR_SDRAM
−
Address/Precharge signal for SDR_SDRAM
Address/Precharge signal for DDR_SDRAM
−
Not used
Data strobe signal (D0 to D7) for DDR_SDRAM
−
Not used
Data strobe signal (D8 to D15) for DDR_SDRAM
−
FB clock for SDR/DDR_SDRAM
TENTATIVE
TMPA900CM- 14
Function
−
When using MPMC0
When using MPMC1
−
When using MPMC0
When using MPMC1
−
When using MPMC0
When using MPMC1
−
When using MPMC0
When using MPMC1
−
When using MPMC0
When using MPMC1
−
When using MPMC0
When using MPMC1
−
When using MPMC0
When using MPMC1
−
When using MPMC0
When using MPMC1
−
For both MPMC0 and MPMC1
−
When using MPMC0
When using MPMC1
−
When using MPMC0
When using MPMC1
−
When using MPMC0
When using MPMC1
−
When using MPMC0
When using MPMC1
−
When using MPMC0
When using MPMC1
−
For both MPMC0 and MPMC1
Remarks
TMPA900CM
2009-10-14