BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 916

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

OFD_RESET
OFDOUTn
1/4 fosch
fs
2) Initialization of OFD registers
3) How to confirm the clock fault detection
Reset signal will be asserted after fs clock is
stopped 513 cycles or more at fosch¥DIV4
initialized by an external reset (RESETn pin = Low).
OFDOUTn pin in OFD circuit.
The OFD registers (CLKSCR1, CLKSCR2, CLKSCR3, CLKSMN and CLKSMX) are
The OFD registers are also initialized when the PCM mode is exited.
The fault detection can be confirmed by OFD status flag (CLKSCR3<CLKSF>=1) or
Note : A clock fault detection reset is also generated if either of the high-frequency or low-frequency clock
Note: The OFD registers are not initialized by a WDT reset or OFD reset.
Figure 3.28.3
frequency temporarily goes outside the specified range of the frequency ratio due to noise, etc.
Timing of reset generating and releasing (fs clock fault)
TMPA900CM - 915
TENTATIVE
Reset signal will be resumed after on the fifth
edge of fs clock
TMPA900CM
2009-10-14