BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 915

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.28.3 Description of Operation
1) Reset generation and release
after detecting a clock (f
detecting low-frequency clock faults.
specified in the CLKSMN and CLKSMX registers, the OFD generates a reset on the second
rising edge of the low-frequency clock after detecting a clock fault. Generation of a reset does
not clear the clock fault detection, and the reset is released when the clock resumes stable
oscillation and the frequency ratio returns to the specified normal range.
is not released until the low-frequency clock resumes oscillation. In this case, the reset signal
is asserted in synchronization with f
low-frequency clock. When both fs and fosch clock are in unstable, the operation is not
guaranteed.
OFD_RESET
OFDOUTn
OFD_RESET
OFDOUTn
In the case of the low-frequency clock, a reset is generated when the clock stops. The reset
The OFD generates a reset on the second or third rising edge of the low-frequency clock
When a high-frequency clock fault occurs and the frequency ratio goes outside the range
Figure 3.28.1
Figure 3.28.2
fosch clock fault
Resume fosch clock
OSCH
Timing of reset generating (fosch clock fault)
Timing of reset releasing (fosch clock fault)
) fault (including a stop state). The OFD is also capable of
TMPA900CM - 914
TENTATIVE
OSCH
/4 and is released in synchronization with the
TMPA900CM
2009-10-14