BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 203
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 203 of 959
- Download datasheet (5Mb)
SELMEMC
3.10.1
circuit and DMC (Dynamic Memory Controller) circuit.
SMC and DMC function as independent circuits in memory controller. DMC and SMC circuits are
controlled by EBI (Exteranal Bus Interface).
Memory controllers (MPMC0 and MPMC1) have a built-in SMC (Static Memory Contoroller)
The external bus of SMC is used also as the external bus of DMC in the TMPA900CM. However,
Internal RAM2
Internal RAM0
EBI (External Bus Interface)
8KB(Remap)
Multi Layer Bus Matrix0
16KB
LCD Data Process
Peripheral Circuit
(Bus Master3)
(Bus Master4)
USB host 1.1 Controller
Accelerator
Controller
Data Cache
Other
LCD
16Kbyte
TimeOut Counter
Internal RAM1
Boot ROM
16KB
CPU Inst.
CPU Data.
8KB
DMA1
DMA2
TENTATIVE
LCDDA
TMPA900CM- 202
LCDC
External Bus Interface
USB
LCDDA
CPU Inst.
LCDC
CPU Data
DMA1
DMA2
ARM926EJ-S
(Bus Master1&2)
Bus Interface
Bus swicther
EBI
CPU Data.
DMA1
DMA2
SMC
SDRAM
Memory
USB
MPMC0
Bus Matrix2
Multi Layer
Instruction Cache
DMC
(Bus Master5&6)
16Kbyte
(Bus Master7)
USB Device
Controller
Controller
DMA
SMC
MPMC1
Memory
NORF
Bus Matrix2
Multi Layer
TMPA900CM
2009-10-14
DMC
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