BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 689

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

[31:5]
[4]
[3]
[2]
[1]
[0]
Bit
[Description]
a. <MBERROR >
b. <Vcomp>
c.
d. <FUF>
9.
AMBA AHB master bus error status. This is set if the AMBA AHB master detects a bus
error response from a slave.
Vertical sync. This is set if any one of the four vertical areas selected from the LCDControl
[13:12] register reaches the timing.
<LNBU>
LCD next address base update. This depends on the mode and is set when the current
base address register is updated by the net address register properly.
FIFO underflow. This is set if either higher- or lower-order DMA FIFO is read and
accessed when it is empty, which is the condition of triggering the underflow condition.
−
MBERROR
Vcomp
LNBU
FUF
−
Symbol
LCDRIS (Raw Interrupt Status Register)
Bit
−
RO
RO
RO
RO
−
Type
Undefined
0y0
0y0
0y0
0y0
Undefined
Reset
Value
TENTATIVE
TMPA900CM- 688
Read undefined. Write as zero.
Request for AMBA AHB master bus error interrupt
0y0: No
0y1: Yes
Request for vertical sync. interrupt
0y0: No
0y1: Yes
Request for LCD next address base update interrupt
0y0: No
0y1: Yes
Request for FIFO underflow interrupt
0y0: No
0y1: Yes
Read as undefined.
Description
Address = (0xF420_0000) + (0x0020)
TMPA900CM
2009-10-14