BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 518
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Bit
[Description]
mwcadr
a. <mwcadr>
13. UDMWCADR (Master Write Current Address register)
Symbol
Displays the addresses to which transfers from endpoints to the Master Write buffers
have been currently completed in Master Write transfers. This can be used in case a
timeout interrupt has occurred or an error occurred during the transfer process.
This address is incremented at the point when the data is set from the endpoint to the
Master Write buffer, while the data will reside inside the target device or the Master
Write buffer during the Master Write transfer process until the displayed address.
Bit
have been currently completed in Master Write transfers (UDC2 to AHB).
a value to the DMAC Read Request register and then read the value from the DMAC
Read Value register.
Displays the address to which transfers from endpoints to the Master Write buffers
This register cannot be read by directly specifying the address. In order to read it, set
RO
Type
TENTATIVE
0x00000000
TMPA900CM- 517
Reset
Value
Master Write current address
Address =(0xF440_0000)+ (0x0048)
Description
TMPA900CM
2009-10-14
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