BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 388

KIT STARTER TMPA900 USB JTAG

BMSKTOPASA900(DCE)

Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Datasheets

Specifications of BMSKTOPASA900(DCE)

Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
14. UART0FBRD (UART0 Fractional baud rate register)
15. UART1FBRD (UART1 Fractional baud rate register)
16. UART2FBRD (UART2 Fractional baud rate register)
[31:6]
[5:0]
[31:6]
[5:0]
[31:6]
[5:0]
[Description]
Bit
Bit
Bit
a. <BAUDDIVFRAC>
Note1: To update the contents of UARTxFBRD internally, the write to UARTxLCR_H must always be executed last.
Note2: This register must be set before set to UARTxCR <UARTEN> = 1.
Note3: 0x0000 setting is prohibited.
value (BAUD DIVFRAC).
The baud rate divisor is calculated as follows:
Baud rate divisor BAUDDIV = (f
f
The BAUDDIV is comprised of the integer value (BAUD DIVINT) and the fractional
UARTCLK
For details, refer to the description of UARTxLCR_H.
BAUD DIVFRAC
BAUD DIVFRAC
BAUD DIVFRAC
Symbol
Symbol
Symbol
is the frequency of UARTCLK.
Bit
Bit
Bit
R/W
R/W
R/W
Type
Type
Type
TENTATIVE
TMPA900CM- 387
Undefined
0x00
Undefined
0x00
Undefined
0x00
UARTCLK
Reset
Reset
Reset
Value
Value
Value
)/ (16 × baud rate)
Read as undefined. Write as zero.
Fractional part of baud rate divisor:
0x01 to 0x3F
Read as undefined. Write as zero.
Fractional part of baud rate divisor:
0x01 to 0x3F
Read as undefined. Write as zero.
Fractional part of baud rate divisor:
0x01 to 0x3F
Address = (0xF200_0000) + (0x0028)
Address = (0xF200_1000) + (0x0028)
Address = (0xF200_4000) + (0x0028)
Description
Description
Description
TMPA900CM
2009-10-14

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