BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 335

KIT STARTER TMPA900 USB JTAG

BMSKTOPASA900(DCE)

Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Datasheets

Specifications of BMSKTOPASA900(DCE)

Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(4) Page Read (4LC type)
――― Main Program ―――
――― INTTC Interrupt Processing Program ―――
――― Main Program ―――
;
; ***** Initialize for NDFC *****
;
;
NDFMCR0
NDFMCR1
NDFMCR2
NDFINTC
; ***** Setting Command, Address to NAND-Flash *****
;
NDFMCR0
NDFDTR
; ***** Reading 512Byte Valid data *****
Have the DMAC and INTC support the Autoload function of 512-byte read data. (Details are omitted.)
NDFMCR1
NDFMCR0
NDFDTR
NDFMCR0
NDFDTR
NDFMCR0
NDFMCR0
Return to the main program
; ***** Reading Dummy data & ECC from NAND-Flash *****
;
NDFDTR
;
; ***** Calculation Error Address and Data *****
;
NDFINTC
Have the INTC enable an NDFC interrupt. (Details are omitted.)
NDFMCR0
――― INTNDFC Interrupt Processing Program
―――
NDFMCR1
Software processing
Return to the main program
If any error is found, the error processing routine is executed to correct the error data.
For details, see Section 3.11.4.2 “Error Correction Methods”.
condition: 8bit-bus, CE0, MLC, 512 Bytes/Page, Reed Solomon
0x0000_0010
0x0000_0002
0x0000_3343
0x0000_0000
0x0000_00b0
0x00
0x0000_0102
0x0000_00d0
0x??
0x0000_00b0
0x030
0x0000_0015
0x0000_0114
Read
0x0000_0090
0x0000_0310
Read and check
TENTATIVE
TMPA900CM- 334
; NDCEn pin = 0, ECC-disable
; ECC = Reed-Solomon
; NEWEn L = 3clks,H = 3clks,
; NDWEn L = 4clks,H = 3clks
; ALL Interrupt Disable
; NDCEn pin = 0, NDCLE = 1, NDALE = 0
; Write Command(1
(Including INTTC interrupt enable)
; <SELALS> = 0, Start Auto-Load
; NDCEn pin = 0, NDCLE = 0, NDALE = 1
; Write Address (n-times)
; NDCEn pin = 0, NDCLE = 1, NDALE = 0
; Read Command(2nd
; NDCEn pin = 0, NDCLE = 0, NDALE = 0
; ECC Enable and Reset, <RSECGW> = 0
; ECC-Enable, <RSECGW>=1
; Read ECC (1 byte x 10 times)
; Clear/enable R/S calculation end interrupt
; Disable ECC, <RSECGW> = 1, <RSESTA> = 1
; Check the <STATE> and <SERR> flags.
st-
cycle of Page-Read)
-
cycle of Page-Read)
TMPA900CM
2009-10-14

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