BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 641
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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[31:14]
[13:12]
[11:9]
[8]
[7:3]
[2]
[1]
[0]
[Description]
Bit
a. <I2SRx_RLCH_CUT>
b. <I2SRx_BITCNV>
2.
0y00: Stereo setting (both channel output)
0y01: Monaural setting (Right-side channel output)
0y10: Monaural setting (Left-side channel output)
0y11: Don’t setting
Specifies whether to invert the MSB (sign bit).
0y0: Not inverted
0y1: Inverted
Stereo/monaural (Right-side channel output, leftt-side channel output) output setting.
I2SRCON (Rx Control Register)
−
I2SRx_RCH_CUT
−
I2SRx_BITCNV
−
I2SRx_MSBINV
I2SRx_WSINV
I2SRx_DELAYOFF
Bit Symbol
−
R/W
−
R/W
−
R/W
R/W
R/W
Type
TENTATIVE
TMPA900CM- 640
Undefined
0y00
Undefined
0y0
Undefined
0y0
0y0
0y0
Reset
Value
Stereo/Monaural output setting
0y00: Stereo setting (both channel output)
0y01: Monaural setting (Right-side channel
0y10: Monaural setting (Left-side channel
0y11:Don’t setting
Read as undefined. Write as zero.
Read as undefined. Write as zero.
MSB (sign bit) inversion
0y0: Not inverted
0y1: Inverted
Read as undefined. Write as zero.
LSB/MSB first 0y0: MSB first
0y1: LSB first
WS channel definition inversion
0y0: WS= 1 (RCH), WS= 0 (LCH)
0y1: WS channel definition inverted
Relationship between Data output timing and
WS
0y0: Delay of 1CLOCK from WS
0y1: No delay from WS
output)
output)
WS= 0 (RCH), WS= 1 (LCH)
Address = (0xF204_0000) + (0x0020)
Description
TMPA900CM
2009-10-14
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