BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 493

KIT STARTER TMPA900 USB JTAG

BMSKTOPASA900(DCE)

Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Datasheets

Specifications of BMSKTOPASA900(DCE)

Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
*1) Be sure to make Read accesses via DMAC Read Request Register.
*2) Be sure to make Read accesses via UDC2 Read Request Register.
*3)Though the registers of UDC2 are assigned to +0x200 to +0x3FC, no access should be made to the registers of
*4) Those shown as ”Reserved” and in addresses of 0x400 to 0xFFF above are prohibited to aceess. Read/Write is
endpoints not supported in the UDC2 to be connected or to any “Reserved” registers.
prohibited to those “Reserved” areas.
UD2ADR
UD2FRM
UD2TMD
UD2CMD
UD2BRQ
UD2WVL
UD2WIDX
UD2WLGTH
UD2INT
UD2INTEP
UD2INTEPMSK
UD2INTRX0
UD2EP0MSZ
UD2EP0STS
UD2EP0DSZ
UD2EP0FIFO
UD2EP1MSZ
UD2EP1STS
UD2EP1DSZ
UD2EP1FIFO
UD2EP2MSZ
UD2EP2STS
UD2EP2DSZ
UD2EP2FIFO
UD2EP3MSZ
UD2EP3STS
UD2EP3DSZ
UD2EP3FIFO
Reserved
UD2INTNAK
UD2INTNAKMSK
Reserved
Register Name
UDC2AB/UDC2 register map (2/2)
0x0200
0x0204
0x0208
0x020C
0x0210
0x0214
0x0218
0x021C
0x0220
0x0224
0x0228
0x022C
0x0230
0x0234
0x0238
0x023C
0x0240
0x0244
0x0248
0x024C
0x0250
0x0254
0x0258
0x025C
0x0260
0x0264
0x0268
0x026C
0x0270 to 0x032C
0x0330
0x0334
0x0338 to 0x03FC
Address (base +)
TENTATIVE
TMPA900CM- 492
UDC2 wValue Register
UDC2 wIndex Register
UDC2 wLength Register
UDC2 INT Register
UDC2 INT_NAK Register
UDC2 INT_NAK_MASK Register
UDC2 Address-State Register
UDC2 Frame Register
UDC2 USB-Testmode Register
UDC2 Command Register
UDC2 bRequest-bmRequestType Register
UDC2 INT_EP Register
UDC2 INT_EP_MASK Register
UDC2 INT_RX_DATA0 Register
UDC2 EP0_MaxPacketSize Register
UDC2 EP0_Status Register
UDC2 EP0_Datasize Register
UDC2 EP0_FIFO Register
UDC2 EP1_MaxPacketSize Register
UDC2 EP1_Status Register
UDC2 EP1_Datasize Register
UDC2 EP1_FIFO Register
UDC2 EP2_MaxPacketSize Register
UDC2 EP2_Status Register
UDC2 EP2_Datasize Register
UDC2 EP2_FIFO Register
UDC2 EP3_MaxPacketSize Register
UDC2 EP3_Status Register
UDC2 EP3_Datasize Register
UDC2 EP3_FIFO Register
Base address = 0xF440_0000
Description
TMPA900CM
2009-10-14

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