BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 266

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

[31:3]
[2:0]
[Description]
Bit
a. <memc_cmd>
2.
at this time varies depending on the immediately preceding command executed on the SDRAM.
If a Read or Write has been executed, the SDRAM will be shifted to ACTIVE. If a AutoRefresh
has been executed, the SDRAM will be shifted to IDLE
transition from Pause to Config is effected by a Config command. Register settings must be
made during the Config state.
allowed. When a read or write is executed, the SDRAM will change from IDLE to ACTIVE.
Settings of this register can change the DMC state machine. If a previously issued
command for changing the states is being executed, a new command is issued after the
previous command is completed.
The following diagram shows DMC state transitions.
When the DMC state is Ready, a Pause command shifts the DMC to Pause. The SDRAM state
When the DMC exits the Reset state, it automatically enters the Config state. The state
When the DMC state is shifted to Ready, reads from and writes to the SDRAM are
dmc_memc_cmd_5 (DMC Memory Controller Command Register)
−
memc_cmd
Symbol
Bit
Reset
POR
config
External memory state transitions
WO
−
Type
TENTATIVE
TMPA900CM- 265
Configure
Undefined
−
Reset
Value
Go
Pause
Sleep
Read undefined. Write as zero.
Change the memory controller status:
0y000 = Go
0y001 = Sleep
0y010 = Wakeup
0y011 = Pause
0y100 = Configure
Pause
Ready
Low
power
(Note).
Wakeup
Go
Description
Address = (0xF431_0000) + (0x0004)
TMPA900CM
2009-10-14