BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 87
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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3.7
VICINTSOURCE [31:0]
3.7.1
3.7.2
Interrupts
•
•
•
•
•
•
AHB
Bus
Functional Overview
Block Diagram
Supports 28 interrupt sources.
Enables to set 16 levels (0 to15) of software interrupt priority for each interrupt source.
Enables to mask hardware and software priority levels.
Supports two types of interrupt requests: normal interrupt request (IRQ) and fast
Enables to generate software interrupts.
multiple interrupt requests of the same software priority level are made simultaneously).
interrupt request (FIQ).
Assigns 32 levels of fixed hardware priorities to the interrupt sources (to be used if
Interrupt
request
interface
register
circuit
AHB
and
Figure 3.7.1 Block diagram
IRQSTATUS [31:0]
FIQSTATUS [31:0]
TENTATIVE
Interrupt vector 31
Interrupt vector 0
Interrupt vector 1
TMPA900CM- 86
:
:
:
:
FIQ interrupt circuit
(Non vectored )
IRQ0
VectAddr0
IRQ1
VectAddr1
IRQ31
VectAddr31
logic
Priority order
IRQ vector
address
circuit
nVICFIQ
TMPA900CM
nVICIRQ
2009-10-14
ARM926
EJ-S
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