BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 812

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2. ADREG0H (AD conversion result higher-order register 0))
[31:8]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
Bit
[Description]
a. <ADR0[9: 2]>
R/W : Read/Write RO : Read Only WO : Write Only
Note : As ADREG0H to ADREG7H and ADREGSPH Registers are the same composition. Explain Register
Conversion setting of
channel x
They are AD conversion result higher-order bits 9 to 2.
−
ADR09
ADR08
ADR07
ADR06
ADR05
ADR04
ADR03
ADR02
About the address of ADREG1H to ADREG7H and ADREGSPH Register, please check Register Map.
ADREG0H only, the other Registers are same as ADREG0H.
Symbol
Bit
−
RO
RO
RO
RO
RO
RO
RO
RO
Type
ADREGxH
9
7
8
6
Undefined
0y0
0y0
0y0
0y0
0y0
0y0
0y0
0y0
TENTATIVE
Reset
TMPA900CM- 811
Value
7
5
4
6
3
5
Read as undefined.
AD conversion result higher-order bit 9
AD conversion result higher-order bit 8
AD conversion result higher-order bit 7
AD conversion result higher-order bit 6
AD conversion result higher-order bit 5
AD conversion result higher-order bit 4
AD conversion result higher-order bit 3
AD conversion result higher-order bit 2
2
4
1
3
•
•
•
0
Always read as 0 when bits 5 to 2 are read.
Bit 0 is the AD conversion result storage flag <ADRxRF>.
Set to 1 when AD conversion settings are stored. Cleared
to 0 when the lower-order register (ADREGxL) is read.
Bit 1 is the overrun flag <OVRx>. Set to 1 when
conversion results are overwritten before reading the
both conversion result storage registers (ADREGxH,
ADREGxL). Cleared to 0 by flag read.
2
1
7
Address = (0xF008_0000) + (0x0044)
Description
0
6
5
4
3
2
ADREGxL
1
TMPA900CM
2009-10-14
0