BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 534

KIT STARTER TMPA900 USB JTAG

BMSKTOPASA900(DCE)

Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Datasheets

Specifications of BMSKTOPASA900(DCE)

Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.16.2.7 Interrupt Signal (INTS[21])
Interrupt Enable Register
Interrupt Status Register
by UDC2 and interrupts generated from other sources. Once the interrupt condition is
met, UDC2AB sets the corresponding bit of its internal Interrupt Status register.
When that bit is set, INTS[21] will be asserted if the relevant bit of Interrupt Enable
register has been set to “Enable.”
be set to the corresponding bit of Interrupt Status register while INTS[21] will not be
asserted. When the relevant bit of Interrupt Enable register is set to “Enable” with
Interrupt Status register set, INTS[21] will be asserted immediately after the setting
is made.
The interrupt output signal of UDC2AB (INTS[21]) consists of interrupts generated
When the relevant bit of Interrupt Enable register has been set to “Disable,” 1 will
Initial values for Interrupt Enable register are all 0 (Disable).
The image of the aforementioned description is shown in the figure below.
Figure 3.16.9 Relationship of INTS[21] and registers
Note: Refer to section of UDC2 for the UDC2 interrupt output signal masking.
TENTATIVE
TMPA900CM- 533
TMPA900CM
2009-10-14

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