BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 657

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

[31:6]
[5]
[4]
[3]
[2]
[1]
[0]
[Description]
a. <MCLKSEL0>
b. <MCLKSEL1>
c.
Bit
15. I2SCOMMON (Common WS/SCK and Loop Setting Register)
Selects the master clock to be output from the receive logic.
0y0: Audio source clock
0y1: Divided-down audio source clock
Selects the master clock to be output from the transmit logic.
0y0: Audio source clock
0y1: Divided-down audio source clock
<I2SSCLK>
Selects the audio source clock to be used.
0y0: PLLCG clock (X1)
0y1: External clock
−
Reserved
MCLKSEL0
MCLKSEL1
I2SSCLK
LOOP
COMMON
Bit Symbol
−
WO
WO
WO
WO
R/W
R/W
Type
TENTATIVE
TMPA900CM- 656
Undefined
0y0
0y0
0y0
0y0
0y0
0y0
Reset
Value
Read as undefined. Write as zero.
Read as undefined. Write as zero.
Master clock to be output from the receive
logic:
0y0: Audio source clock
0y1: Divided-down audio source clock
Master clock to be output from the transmit
logic:
0y0: Audio source clock
0y1: Divided-down audio source clock
Audio source clock:
0y0: PLLCG clock (X1)
0y1: External clock
Loop setting
0y0: Loop disabled
0y1: Loop enabled
Common or separate SCK/WS for Tx and Rx:
0y0: Separate
0y1: Common
Address = (0xF204_0000) + (0x0044)
Description
TMPA900CM
2009-10-14