BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 676
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Horizontal
sync signal
LCLLP
Panel clock
LCLCP
Panel data
LCD[23:0]
LCLAC
LCLLE
Signal name
(Horizontal sync
Note: For CPL, divide PPL by 1 (TFT), 4 or 8 (monochrome STN), or (2 + 2/3) (color STN) to set the division value.
(example: HSW = 6, HBP = 10) prevents data from being corrupted even when PCD = 4
(minimum value).
LCDTiming2<IPC> = 0, LCDTiming2<IOE> = 0):
pulse)
HSW
• Limitations on horizontal timing
There is a restriction on the operation mode used.
Depending on usage conditions, setting enough time before the start point of line
The figure below shows an example of operation mode settings (LCDTiming2<IHS> = 1,
Horizontal non-data area
minimum values are HSW = 2, HBP = 2.
STN single panel mode:
• HSW = 3
• HBP = 5
• HFP = 5
• Panel clock divisor (PCD) = 1(HCLK/3)
STN Dual panel mode:
• HSW = 3
• HBP = 5
• HFP = 5
• PCD = 5(HCLK/7)
(Horizontal back
Figure 3.19.3 Basic operation of horizontal control
porch)
HBP
TENTATIVE
(Number of valid data pixels)
TMPA900CM- 675
(Number of clocks per line)
16*(PPL+1)
CPL
(Delay of CLLE)
(Horizontal front porch)
Horizontal non-data area
LED
HFP
4-HCLK width
TMPA900CM
2009-10-14
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