M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 106

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
R
R
e
E
3
. v
J
2
Figure 9.2 CM0 Register
0
C
1
9
8 /
0 .
B
0
1
4
0
G
3
J
6
u
o r
0 -
System Clock Control Register 0
. l
b7
u
NOTES:
0
1
p
, 7
0
10. After the CM07 bit is set to "0", set the PM21 bit to "1".
11. When stop mode is entered, the CM03 bit is set to "1".
b6
1. Rewrite the CM0 register after the PRC0 bit in the PRCR register is set to "1" (write enable).
2. When the PM07 bit in the PM0 register is set to "0" (BCLK output), set the CM01 and CM00 bits to
3. fc
4. When setting the CM04 bit is set to "1", set the PD8_7 and PD8_6 bits in the PD8 register to "00
5. When entering low-power consumption mode or on-chip oscillator low-power consumption mode, the
6. When the CM05 bit is set to "1", the MCD4 to MCD0 bits in the MCD register are set to "01000
7. Once the CM06 bit is set to "1", it cannot be set to "0" by program.
8. After the CM04 bit is set to "1" with a stable sub clock oscillation, set the CM07 bit to "1" from "0".
9. When the PM21 bit in the PM2 register is set to "1" (clock change disable), the CM02, CM05 and
1
(
2
M
"00
CM01 and CM00 bits to "00
CM00 bits) in microprocessor or memory expansion mode, and the CM01 and CM00 bits are set to
"00
mode.
(port P8
CM05 bit stops running the main clock. The CM05 bit cannot detect whether the main clock stops or
not. To stop running the main clock, set the CM05 bit to "1" after the CM07 bit is set to "1" with a stable
sub clock oscillation or after the CM21 bit in the CM2 register is set to "1" (on-chip oscillator clock).
When the CM05 bit is set to "1", the clock applied to X
remains ON. X
(divide-by-8 mode). In on-chip oscillation mode, the MCD4 to MCD0 bits are not set to "01000
if the CM05 bit terminates X
After the CM05 bit is set to "0" with a stable main clock oscillation, set the CM07 bit to "0" from "1".
Do not set the CM07 bit and CM04 or CM05 bit simultaneously.
CM07 bits do not change even when written.
0
b5
3
32
0
2
2
2
5
". When the PM15 and PM14 bits in the PM1 register are set to "01
", an "L" signal is output from port P5
b4
does not stop running. When the CM02 bit is set to "1", the PLL clock cannot be used in wait
C
8 /
b3
7
Page 83
, 4
and P8
b2
M
3
b1
IN
2
6
C
is pulled up to X
in input mode) and the PU25 bit in the PUR2 register to "0" (no pull-up).
b0
8 /
f o
4
4
Symbol
) T
CM00
CM01
CM02
CM04
CM05
CM06
CM07
CM03
9
Bit
5
Symbol
CM0
2
IN
". When the PM07 bit is set to "1" (function selected in the CM01 and
-X
OUT
Clock Output Function
Select Bit
In Wait Mode, Peripheral
Function Clock Stop Bit
Port X
Main Clock (X
Stop Bit
Watchdog Timer
Function Select Bit
CPU Clock Select
Bit 0
X
Capacity Select Bit
OUT
CIN
.
(8, 9, 10)
-X
("H" level) via the feedback resistor.
C
Bit Name
COUT
(5, 9)
Switch Bit
3
(2)
(port P5
(1)
Address
0006
Drive
IN
-X
16
3
OUT
(11)
does not function as an I/O port).
OUT
)
(9)
becomes "H". The built-in feedback resistor
0 0 : I/O port P5
0 1 : Outputs f
1 0 : Outputs f
1 1 : Outputs f
b1 b0
0 : Peripheral clock does not stop in
1 : Peripheral clock stops in wait
0 : Low
1 : High
0 : Main clock oscillates
1 : Main clock stops
0: Clock selected by the CM21 bit
1: Sub clock
0 : I/O port function
1 : X
0 : Watchdog timer interrupt
1 : Reset
divided by MCD register setting
mode
wait mode
CIN
-X
(3)
(7)
COUT
After Reset
0000 1000
2
Function
" (ALE output to P5
C
8
32
3
oscillation function
(6)
2
9. Clock Generation Circuit
3
), set the
(4)
2
2
" even
"
2
RW
"
RW
RW
RW
RW
RW
RW
RW
RW