M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 12

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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24. Programmable I/O Ports _____________________ 372
25. Flash Memory Version _______________________ 396
23.2 CAN Clock ............................................................................................................. 365
23.3 Timing with CAN-Associated Registers ............................................................. 366
23.4 CAN Interrupts ...................................................................................................... 368
24.1 Port Pi Direction Register (PDi Register, i=0 to 15)........................................... 372
24.2 Port Pi Register (Pi Register, i=0 to 15) .............................................................. 372
24.3 Function Select Register Aj (PSj Register) (j=0 to 3, 5, 8, 9) ............................ 372
24.4 Function Select Register B0 to B3 (PSL0 to PSL3 Registers) ......................... 372
24.5 Function Select Register C (PSC, PSC2, PSC3 Registers) .............................. 373
24.6 Function Select Register D (PSD1 Register) ..................................................... 373
24.7 Pull-up Control Register 0 to 4 (PUR0 to PUR4 Registers) .............................. 373
24.8 Port Control Register (PCR Register) ................................................................ 373
24.9 Input Function Select Register (IPS and IPSA Registers) ................................ 373
24.10 Analog Input and Other Peripheral Function Input ......................................... 373
25.1 Memory Map ......................................................................................................... 397
23.1.13 CAN0 Error Interrupt Mask Register (C0EIMKR Register) ...................... 341
23.1.14 CAN0 Error Interrupt Status Register (C0EISTR Register) ..................... 342
23.1.15 CAN0 Error Factor Register (C0EFR Register) ........................................ 343
23.1.16 CAN0 Mode Register (C0MDR Register) ................................................... 344
23.1.17 CAN0 Single-Shot Control Register (C0SSCTLR Register) .................... 346
23.1.18 CAN0 Single-Shot Status Register (C0SSSTR Register) ........................ 347
23.1.19 CAN0 Global Mask Register, CAN0 Local Mask Register A and CAN0 Local Mask
23.1.20 CAN0 Message Slot j Control Register (C0MCTLj Register) (j=0 to 15) ..... 355
23.1.21 CAN0 Slot Buffer Select Register (C0SBS Register) ............................... 359
23.1.22 CAN0 Message Slot Buffer j (j=0,1) ........................................................... 360
23.1.23 CAN0 Acceptance Filter Support Register (C0AFS Register)................. 364
23.2.1 Main Clock Direct Mode ............................................................................... 365
23.3.1 CAN Module Reset Timing ........................................................................... 366
23.3.2 CAN Transmit Timing ................................................................................... 366
23.3.3 CAN Receive Timing ..................................................................................... 367
23.3.4 CAN Bus Error Timing .................................................................................. 368
23.4.1 CAN0 Wake-Up Interrupt .............................................................................. 368
23.4.2 CAN0j Interrupts ........................................................................................... 368
25.1.1 Boot Mode ..................................................................................................... 398
Register B (C0GMRk, C0LMARk and C0LMBRk Registers) (k=0 to 4) ....................... 348
A-7