M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 196

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
R
R
15.2 Timer B
e
E
3
. v
J
2
Figure 15.16 Timer B Block Diagram
Figure 15.17 TB0 to TB5 Registers
0
C
Figure 15.16 shows a block diagram of the timer B. Figures 15.17 to 15.19 show registers associated with
the timer B. The timer B supports the following three modes. The TMOD1 and TMOD0 bits in the TBiMR
register (i=0 to 5) determine which mode is used.
1
9
8 /
0 .
B
• Timer mode : The timer counts an internal count source.
• Event counter mode : The timer counts pulses from an external source or overflow and underflow of
• Pulse period/pulse width measurement mode : The timer measures pulse period or pulse width of an
Table 15.8 lists TBi
0
1
4
another timer.
external signal.
0
TBi
G
3
J
TBj Overflow
Signal
6
u
IN
o r
0 -
. l
b15
Timer Bi Register
u
TCK1 and TCK0, TMOD1 and TMOD0 : Bits in the TBiMR Register
TBiS : Bits in the TABSR and the TBSR Register
i=0 to 5
NOTES:
0
1
p
, 7
0
(2,3)
1. The CNT3 to CNT0 bits in the TCSPR register select no
2. Overflow signal or underflow signal.
3. j=i-1, except j=2 when i=0 j=5 when i=3
NOTES:
1
(
2
M
division (n=0) or divide-by-2n (n=1 to 15).
Select Clock Source
0
1. Use 16-bit data for reading and writing.
2. The TBi register counts how many pulse inputs are provided externally or how many times another
Polarity Switching
and Edge Pulse
f
f
f
f
3
0
2n
1
8
c32
2
5
timer counter overflows and underflows.
(1)
b8 b7
C
8 /
10
00
01
11
Page 173
, 4
IN
TCK1 and
TCK0
M
pin settings.
3
2
C
00: Timer Mode
01: Pulse Period/Pulse Width
b0
8 /
f o
(1)
1
0
4
Timer Mode
Event Counter
Mode
Pulse Period/Pulse
Width Measurement
Mode
4
Measurement Mode
) T
9
TCK1
(i=0 to 5)
Symbol
TB0 to TB2
TB3 to TB5
5
Mode
01: Event
Counter Mode
Address
0351
0311
If setting value is n, a count source
is divided by n+1
If setting value is n, a count source
is divided by n+1
A count source is incremented
between one valid edge and
another valid edge of TBi
16
16
- 0350
- 0310
TMOD1 and
TMOD0
16
16
, 0313
, 0353
Function
Counter Reset Circuit
16
16
(2)
Timer B0
Timer B1
Timer B2
Timer B3
Timer B4
Timer B5
- 0312
- 0352
TBi
16
16
TBiS
IN
, 0315
, 0355
pulse
0351
0353
0355
0311
0313
0315
16
16
High-order Bits of Data Bus
Low-order Bits of Data Bus
16
16
16
16
16
16
Address
- 0314
- 0354
Reload Register
0350
0352
0354
0310
0312
0314
0000
0000
8 low-order
bits
16
16
Setting Range
Counter
16
16
16
16
16
16
16
16
After Reset
Indeterminate
Indeterminate
to FFFF
to FFFF
Timer B2
Timer B0
Timer B1
Timer B5
Timer B3
Timer B4
TBj
15. Timer (Timer B)
16
16
RW
RW
RW
RO
8 high-
order
bits