M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 251

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
R
R
e
E
3
. v
J
2
Table 17.21 Pin Settings in Special Mode 2 (1)
Table 17.22 Pin Settings (2)
Table 17.23 Pin Settings (3)
0
C
NOTES:
NOTES:
P6
P6
P6
P6
P6
P6
P6
P6
P7
P7
P7
P7
P9
P9
P9
P9
P9
P9
P9
P9
1
9
8 /
0 .
B
Port
1. P7
1. Set the PD9 and PS3 registers immediately after the PRC2 bit in the PRCR register is set to "1" (write enable). Do not
Port
0 (1)
1 (1)
0
1
2
3
4
5
6
7
2
3
0
1
2
3
4
5
6
7
0
Port
1
4
0
generate an interrupt or a DMA transfer between the instruction to set to the PRC2 bit to "1" and the instruction to set
the PD9 and PS3 registers.
G
3
J
6
u
o r
0
0 -
. l
and P7
u
0
1
p
, 7
0
1
SS0 input
CLK0 input (slave)
CLK0 output (master) PS0_1=1
RxD0 input (master)
STxD0 output (slave) PS0_2=1
TxD0 output (master) PS0_3=1
SRxD0 input (slave)
SS1 input
CLK1 input (slave)
CLK1 output (master) PS0_5=1
RxD1 input (master)
STxD1 output (slave) PS0_6=1
TxD1 output (master) PS0_7=1
SRxD1 input (slave)
TxD2 output (master) PS1_0=1
SRxD2 input (slave)
RxD2 input (master)
STxD2 output (slave) PS1_1=1
CLK2 input (slave)
CLK2 output (master) PS1_2=1
SS2 input
CLK3 input (slave)
CLK3 output (master) PS3_0=1
RxD3 input (master)
STxD3 output (slave) PS3_1=1
TxD3 output (master) PS3_2=1
SRxD3 input (slave)
SS3 input
_______
SS4 input
CLK4 input (slave)
CLK4 output (master) PS3_5=1
TxD4 output (master) PS3_6=1
SRxD4 input (slave)
RxD4 input (master)
STxD4 output (slave) PS3_7=1
______
______
______
______
(
2
M
0
3
0
1
2
5
Function
are ports for the N-channel open drain output.
Function
Function
C
8 /
Page 228
, 4
M
3
2
C
8 /
f o
4
4
) T
PS1_0=0
PS1_1=0
PS1_2=0
PS1_3=0
9
PS0_0=0
PS0_1=0
PS0_2=0
PS0_3=0
PS0_4=0
PS0_5=0
PS0_6=0
PS0_7=0
PS3_0=0
PS3_1=0
PS3_2=0
PS3_3=0
PS3_4=0
PS3_5=0
PS3_6=0
PS3_7=0
5
PS3 Register
PS0 Register
PS1 Register
(1)
PSL0_2=1
PSL0_6=1
PSL3_1=1
PSL3_2=0
PSL3_3=0
PSL3_4=0
PSL3_5=0
PSL3_6=0
PSL3_7=1
PSL1_0=0
PSL1_1=1
PSL1_2=0
PSL0 Register
PSL1 Register
PSL3 Register
Setting
Setting
Setting
PSC_0=0
PSC_1=0
PSC_2=0
PD6_0=0
PD6_1=0
PD6_2=0
PD6_3=0
PD6_4=0
PD6_5=0
PD6_6=0
PD6_7=0
PD9_0=0
PD9_1=0
PD9_2=0
PD9_3=0
PD9_4=0
PD9_5=0
PD9_6=0
PD9_7=0
PSC Register
PD9 Register
PD6 Register
17. Serial I/O (Special Function)
(1)
PD7_0=0
PD7_1=0
PD7_2=0
PD7_3=0
PD7 Register