M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 270

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Table 18.1 A/D Converter Specifications
NOTES:
0
A/D Conversion Method
Analog Input Voltage
Operating Clock, Ø
Resolution
Operating Mode
Analog Input Pins
A/D Conversion Start Condition
Conversion Rate Per Pin
C
1
9
1. Analog input voltage is not affected by the sample and hold function status.
2. Ø
3. AV
8 /
0 .
B
0
1
4
Ø
Without the sample and hold function, the Ø
With the sample and hold function, the Ø
A/D input voltage (for AN0
0
AD
AD
G
3
J
CC
6
u
o r
0 -
. l
frequency must be under 16 MHz when V
frequency must be under 10 MHz when V
u
= V
0
1
p
, 7
0
Item
1
(
REF
2
M
0
3
0
(3)
2
= V
5
AD (2)
C
(1)
8 /
CC1
Page 247
, 4
M
V
3
CC2
2
0
C
to AN0
8 /
, A/D input voltage (for AN
f o
Successive approximation (with a capacitive coupling amplifier)
0V to AV
f
Select from 8 bits or 10 bits
One-shot mode, repeat mode, single sweep mode, repeat sweep mode 0,
repeat sweep mode 1, multi-port single sweep mode, multi-port repeat sweep
mode 0
34 pins
• Software trigger
• External trigger (re-trigger is enabled)
• Hardware trigger (re-trigger is enabled)
• Without the sample and hold function
• With the sample and hold function
4
AD
4
When a falling edge is applied to the AD
The timer B2 interrupt request of the three-phase motor control timer functions
8 pins each for AN (AN
AN15 (AN15
2 extended input pins (ANEX0 and ANEX1)
The ADST bit in the AD0CON0 register is set to "1" (A/D conversion started) by
program
program
(after the ICTB2 counter completes counting) is generated after the ADST bit is
set to "1" by program
) T
9
8-bit resolution : 49 Ø
10-bit resolution : 59 Ø
8-bit resolution : 28 Ø
10-bit resolution : 33 Ø
, f
5
7
AD
and AN2
/2, f
CC
AD
AD
(V
/3, f
0
AD
frequency is 1 MHz or more.
CC1
0
to AN15
CC1
CC1
to AN2
frequency is 250 kHz or more.
AD
)
/4, f
=5V.
=3.3V.
7
7
AD
AD
AD
0
0
)
)
AD
AD
to AN
to AN
/6, f
cycles
cycles
V
cycles
cycles
CC2
AD
7
7
Specification
/8
), AN0 (AN0
, AN15
.
__________
0
TRG
to AN15
pin after the ADST bit is set to "1" by
0
to AN0
7
, ANEX0 and ANEX1)
7
), AN2 (AN2
18. A/D Converter
0
to AN2
V
7
),
CC1
,