M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 527
M30845FJGP#U3
Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Specifications of M30845FJGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Rev.
REVISION HISTORY
Date
Page
104
105
113
124
131
162
164
165
170
171
176
177
178
180
194
196
197
198
202
213
225
226
58
62
87
Processor Mode
• Figure 7.2 PM1 Register PM13 bit function changed
Bus
• Table 8.2 Processor Mode and Port Function Note 3 modified
Clock Generation Circuit
• Figure 9.6 TCSPR Register Value after reset modified
• Figure 9.14 Status Transition Note 4 repleaced to note 5
• 9.6 System Clock Protection Function Description modified
Interrupt
• Table 11.2 Relocatable Vector Table Fault Error deleted; Note 4 deleted
• Figure 11.10 IFSR Register IFSR6 and IFSR7 bit functions changed
Watchdog Timer
• Chapter description modified
Timer
• Table 15.3 Timer Mode Specifications Write to Timer specification changed
• Table 15.4 Event Counter Mode Specifications Write to Timer specification
• Table 15.5 Event Counter Mode Specifications Write to Timer specification
• Table 15.7 Pulse Width Modulation Mode Specifications Write to Timer
• Figure 15.13 TA0MR to TA4MR Registers Value after reset modified
• Table 15.9 Timer Mode Specifications Write to Timer specification changed
• Table 15.10 Event Counter Mode Specifications Write to Timer specification
• Figure 15.21 TB0MR to TB5MR Registers TCK1 bit name modified
• Figure 15.22 TB0MR to TB5MR Registers Notes 1 and 2 modified
Serial I/O
• Figure 17.1 UARTi Block Diagram Diagram modified
• Figure 17.3 U0MR to U4MR Registers Value after reset modified
• Figure 17.4 U0C0 to U4C0 Registers Note 1 modified
• Figure 17.5 U0C1 to U4C1 Registers Note 2 modified
• Figure 17.9 IFSR Register IFSR6 and IFSR7 bit functions changed
• Table 17.13 Register Settings in I
• 17.3.6 SDA Input The IICM bit in the description modified to the IICM2 bit
• Table 17.19 Special Mode 2 Specifications Transmit/Receive Control speci-
changed
changed
specification changed
changed
fication changed; Transmit Start Condision specification changed; Error Detec-
tion specification changed
M32C/84 Group(M32C/84, M32C/84T) Hardware Manual
C-9
Description
2
Summary
C Mode SWC and ALS bit functions modified
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