M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 115

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Table 9.2 Bit Settings for On-Chip Oscillator Start Condition
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9.1.3 On-Chip Oscillator Clock
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On-chip oscillator generates the on-chip oscillator clock. The 1-MHz on-chip oscillator clock becomes a
clock source of the CPU clock and peripheral function clock.
The on-chip oscillator clock stops after reset. When the CM21 bit in the CM2 register is set to "1" (on-chip
oscillator clock), the on-chip oscillator starts oscillating. Instead of the main clock, the on-chip oscillator
clock becomes clock source of the CPU clock and peripheral function clock.
Table 9.2 shows bit settings for on-chip oscillator start condition.
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9.1.3.1 Oscillation Stop Detect Function
9.1.3.2 How to Use Oscillation Stop Detect Function
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When the main clock is terminated by external source, the on-chip oscillator automatically starts oscil-
lating to generate another clock.
When the CM 20 bit in the CM2 registser is set to "1" (oscillation stop detect function enabled), an oscilla-
tion stop detection interrupt request is generated as soon as the main clock stops. Simultaneously, the on-
chip oscillator starts oscillating. Instead of the main clock, the on-chip oscillator clock becomes clock
source for the CPU clock and peripheral function clock. Associated bits are set as follows:
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• The oscillation stop detection interrupt shares vectors with the watchdog timer interrupt and the low
• When the main clock resumes running after an oscillation stop is detected, set the main clock as
• In low-speed mode, when the main clock is stopped by setting the CM20 bit to "1", the oscillation
• When the peripheral function clock stops running, the oscillation stop detect function is also dis-
• The oscillation stop detect function is provided to handle main clock stop caused by external source.
• When the main clock frequency is 2MHz or less, the oscillation stop detect function is not available.
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voltage detection interrupt. When these interrupts are used simultaneously, read the CM22 bit with
an interrupt routine to determine if an oscillation stop detection interrupt request has been gener-
ated.
clock source of the CPU clock and peripheral function clock. Figure 9.11 shows the procedure to
switch the on-chip oscillator clock to the main clock.
stop detection interrupt request is generated. Simultaneously, the on-chip oscillator starts oscillat-
ing. The sub clock remains the CPU clock source. The on-chip oscillator clock becomes a clock
source for the peripheral function clock.
abled. To enter wait mode while the oscillation stop detect function is in use, set the CM02 bit in the
CM0 register to "0" (peripheral clock does not stop in wait mode).
Set the CM20 bit to "0" (oscillation stop detect function disabled) when the main clock is terminated
by program, i.e., entering stop mode or setting the CM05 bit to "1" (main clock oscillation stop).
Set the CM20 bit to "0".
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• The CM21 bit is set to "1" (on-chip oscillator clock becomes a clock source of the CPU clock.)
• The CM22 bit is set to "1" (main clock stop is detected.)
• The CM23 bit is set to "1" (main clock stops.) (See Figure 9.14)
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9. Clock Generation Circuit
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