M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 366

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
R
R
e
E
3
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J
2
Figure 23.17 C0EFR Register
0
C
23.1.15 CAN0 Error Factor Register (C0EFR Register)
1
9
8 /
0 .
B
The C0EFR register indicates the cause of error when a communication error is detected. Set the
following bits to "0" by program because they are not changed "1" to "0" automatically.
Use the MOV instruction, instead of the bit clear instruction, to set each bit in the C0EFR register to "0".
Bits not being changed to "0" must be set to "1".
0
1
4
23.1.15.1 ACKE Bit
23.1.15.2 CRCE Bit
23.1.15.3 FORME Bit
23.1.15.4 STFE Bit
23.1.15.5 BITE0 Bit
23.1.15.6 BITE1 Bit
23.1.15.7 RCVE Bit
23.1.15.8 TRE Bit
The ACKE bit is set to "1" when an ACK error is detected.
The CRC bit is set to "1" when a CRC error is detected.
The FORME bit is set to "1" when a form error is detected.
The STFE bit is set to "1" when a stuff error is detected.
The BITE0 bit is set to "1" when a bit error is detected while transmitting recessive "H".
The BITE1 bit is set to "1" when a bit error is detected while transmitting dominant "L".
The RCVE bit is set to "1" when an error is detected while receiving data.
The TRE bit is set to "1" when an error is detected while transmitting data.
0
G
3
J
6
u
o r
0 -
. l
For example: To set the ACKE bit to "0"
u
CAN0 Error Factor Register
0
1
b7
p
, 7
0
NOTES:
1
(
b6
2
M
1. Value is obtained by setting the SLEEP bit in the C0SLPR register to "1" (sleep mode exited) after
2. Set to "0" by program. If it is set to "1", the value before setting to "1" remains.
0
3
Assembly language:
C language:
0
b5
reset and supplying the clock to the CAN module.
2
5
C
b4
8 /
Page 343
b3
, 4
M
b2
3
b1
2
C
b0
8 /
f o
4
4
) T
FORME
Symbol
9
CRCE
ACKE
BITE0
BITE1
STFE
RCVE
TRE
5
Bit
Symbol
C0EFR
ACK Error Detect Bit
CRC Error Detect Bit
FORM Error Detect Bit
Stuff Error Detect Bit
Bit Error Detect Bit 0
Bit Error Detect Bit 1
Transmit Error Detect Bit
mov.b#0FEh, C0EFR
c0efr = 0xFE;
Receive Error Detect Bit
Bit Name
Address
0216
16
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
0: Detects no ACK error
1: Detects an ACK error
0: Detects no CRC error
1: Detects a CRC error
0: Detects no form error
1: Detects a form error
0: Detects no stuff error
1: Detects a stuff error
0: Detects no bit error while transmitting "H"
1: Detects a bit error while transmitting "H"
0: Detects no bit error while transmitting "L"
1: Detects a bit error while transmitting "L"
0: Detects no error while receiving data
1: Detects an error while receiving data
0: Detects no error while transmitting data
1: Detects an error while transmitting data
After Reset
00
Function
16
(1)
23. CAN Module
RW
RW
RW
RW
RW
RW
RW
RW
RW