M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 525

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Rev.
REVISION HISTORY
Date
424, 425
430-431
421-423
Page
334
365
374
375
376
377
378
380
387
389
391
393
394
396
398
399
420
428
433
CAN
• 23.1.6.5 SJW1 and SJW0 Bits Explanation added
• 23.2 CAN Clock Section added
Programmable I/O Ports
• Figure 24.1 Programmable I/O Ports (1) P15
• Figure 24.2 Programmable I/O Ports (2) Figure in Programmable I/O Ports
• Figure 24.3 Programmable I/O Ports (3) P15 deleted; P15
• Figure 24.5 PD0 to PD15 Registers Note 1 modified
• Figure 24.6 P0 to P15 Registers Note 1 modified
• Figure 24.8 PS2 Register and PS3 Register Description added to Note 1
• Figure 24.15 PUR0 Register, PUR1 Register and PUR2 Register Note 1
• Figure 24.17 PCR Register and IPS Register Note 1 added to the PCR register
• Table 24.2 Unassigned Pin Setting in Memory Expansion Mode and Micro-
• Figure 24.19 Unassigned Pin Handling Figure modified
• Table 24.3 Port P6 Peripheral Function Output Control Bits 3, 6 and 7 modified
• Table 24.4 Port P7 Peripheral Function Output Control Bits 0 and 1 modified
• Table 24.6 Port P9 Peripheral Function Output Control Bits 2 and 6 modified
Flash Memory Version
• Table 25.1 Flash Memory Version Specifications Description modified
• 25.2.1 ROM Code Protect Function Sentence partially deteled
• Figure 25.2 ROMCP Address Bits 4 and 5 deleted; Note 2 to 4 modified
• Table 25.7 Pin Description (Flash Memory Standard Serial I/O Mode) De-
• Figures 25.14 to 25.16 Pin Connections in Standard Serial I/O Mode Figures
• Figure 25.17 to 25.19 Circuit Application in Standard Serial I/O Mode Figures
Electrical Characteristics
• Table 26.2 Recommended Operating Conditions f
• Table 26.3 Electrical Characteristics Standard value in low power consump-
• Table 26.6 Flash Memory Version Electrical Characteristics Notes modified
added
with the Function Select Register modified
each added to the PUR0 Register and PUR1 Register
processor Mode Table modified; note 3 added
scription of the P7
modified
modified
SV
tion mode added; min. value of V
version) in low power consumption mode added
CC
and note 1 added; standard max. and min. value of f
M32C/84 Group(M32C/84, M32C/84T) Hardware Manual
6
and P7
C-7
Description
7
pins revised
Summary
OH
changed; standard value (Masked ROM
0
to P15
(ripple)
7
deleted; P15
(RING)
0
, Vp-p
added
added
(ripple)
2
to P15
, V
CC
7
,