M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 371

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30845FJGP#U3M30845FJGP
Manufacturer:
TI
Quantity:
18 562
Company:
Part Number:
M30845FJGP#U3
Manufacturer:
MIT
Quantity:
2 367
Company:
Part Number:
M30845FJGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M30845FJGP#U3M30845FJGP#U5
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
M30845FJGP#U3M30845FJGP#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M
R
R
e
E
3
. v
J
2
Figure 23.22 C0GMR0, C0LMAR0 and C0LMBR0 Registers
0
C
23.1.19 CAN0 Global Mask Register, CAN0 Local Mask Register A and CAN0 Local Mask
1
9
0 .
8 /
B
0
1
4
0
3
G
J
6
u
o r
CAN0 Global Mask Register Standard ID0
CAN0 Local Mask Register A Standard ID0
CAN0 Local Mask Register B Standard ID0
0 -
. l
b7
u
NOTES:
0
1
p
, 7
0
b6
Register B (C0GMRk, C0LMARk and C0LMBRk Registers)
1
1. The C0GMR0, C0LMAR0 and C0LMBR0 registers can be accessed only when the BANKSEL bit in
2. Value is obtained by setting the SLEEP bit in the C0SLPR register to "1" (sleep mode exited) after
3. The C0LMAR0 register shares the same address with the C0MCTL0 register.
4. The C0LMBR0 register shares the same address with the C0MCTL8 register.
(
2
M
b5
0
the C0CTLR1 register is set to "1" (mask register selected).
reset, supplying the clock to the CAN module, and setting the BANKSEL bit to "1".
3
0
2
5
b4
C
8 /
b3
Page 348
, 4
b2
M
b1
3
2
C
b0
f o
8 /
(b7 - b5)
4
SID10M
Symbol
4
SID6M
SID7M
SID8M
SID9M
) T
9
Bit
5
Symbol
C0GMR0
C0LMAR0
C0LMBR0
Standard ID6
Standard ID7
Standard ID8
Standard ID9
Standard ID10
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Bit Name
Address
0228
0230
0238
16
16 (3)
16
(4)
(1)
0: No ID is verified
1: ID is verified
(1)
(1)
Function
After Reset
XXX0 0000
XXX0 0000
XXX0 0000
(2)
2
2
2
(k=0 to 4)
23. CAN Module
RW
RW
RW
RW
RW
RW