M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 509

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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• Wrong values are stored in the AD0i register (i=0 to 7) if the CPU reads the AD0i register while the AD0i
• Conversion results of the A/D converter are indeterminate if the ADST bit in the AD0CON0 register is set
• External triggers cannot be used in DMAC operating mode. Do not read the AD00 register by program.
• Do not perform the A/D conversion in wait mode.
• Set the MCD4 to MCD0 bits in the MCD register to "10010
• Do not acknowledge any interrupt requests, even if generated, before setting the ADST bit, if the A/D
• AV
0
In one-shot mode or single sweep mode, read the corresponding AD0i register after verifying that the A/D
If the ADST bit is changed to "0" by program, during the A/D conversion, do not use any values obtained
1
register stores results from a completed A/D conversion. This occurs when the CPU clock is set to a
divided main clock or a sub clock.
conversion has been completed. The IR bit in the AD0IC register determines the completion of the A/D
conversion.
In repeat mode, repeat sweep mode 0, repeat sweep mode 1, multi-port single sweep mode, and multi-
port repeat sweep mode 0, use an undivided main clock as the CPU clock.
to "0" (stop A/D conversion) and the conversion is forcibly terminated by program during the A/D conver-
sion. The AD0i register not performing the A/D conversion may also be indeterminate.
from the AD0i registers.
function.
conversion is terminated by setting the ADST bit in the AD0CON0 register to "0" (A/D conversion
stopped) while the microcomputer is A/D converting in single sweep mode.
4
0
A/D input voltage (for AN
A/D input voltage (for AN0
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CC
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Page 486
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CC1
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7
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to AN15
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, ANEX0, and ANEX1)
7
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2
" (no division) if using the sample and hold
V
CC2
.
27. Precautions (A/D Converter)
V
CC1
,