M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 179

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R
R
M
15.1 Timer A
e
E
3
. v
J
2
Figure 15.3 Timer A Block Diagram
0
C
Figure 15.3 shows a block diagram of the timer A. Figures 15.4 to 15.7 show registers associated with the
timer A.
The timer A supports the following four modes. Except in event counter mode, all timers A0 to A4 have the
same function. The TMOD1 and TMOD0 bits in the TAiMR register (i=0 to 4) determine which mode is
used.
Table 15.1 lists TAi
when used as an input.
1
9
0 .
8 /
B
• Timer mode: The timer counts an internal count source.
• Event counter mode: The timer counts an external pulse or an overflow and underflow of other timers.
• One-shot timer mode: The timer outputs one valid pulse until a counter value reaches "0000
• Pulse width modulation mode: The timer continuously outputs desired pulse widths.
0
1
4
0
3
G
J
6
u
o r
TAi
0 -
. l
f
f
f
f
C32
1
8
TAi
2n
u
0
1
IN
Select Count Source
(1)
p
, 7
0
OUT
TB2 Overflow
TAj Overflow
TAk Overflow
i=0 to 4
j=i-1, except j=4 if i=0
k=i+1, except k=0 if i=4
NOTES:
TCK1 and TCK0, TMOD1 and TMOD0, MR2 and MR1 : Bits in the TAiMR register
TAiTGH and TAiTGL : Bits in the ONSF register if i=0 or bits in the TRGSR register if i=1 to 4
TAiS : Bits in the TABSR register
TAiUD : Bits in the UDF register
1
00
01
10
11
(
Selector
2
Polarity
M
1. The CNT3 to CNT0 bits in the TCSPR register select
2. Overflow or underflow signal
0
TCK1 and
TCK0
3
0
no division (n=0) or divide-by-2n (n=1 to 15).
5
2
C
Pulse Output
OUT
8 /
Page 156
(2)
, 4
(2)
(2)
• Timer Mode
• One-Shot Timer Mode :TMOD1 and TMOD0=10
• Pulse Width Modulation Mode
pin settings when used as an output. Table 15.2 lists TAi
M
01
10
00
11
3
TAiTGH and TAiTGL
2
• Timer Mode (gate function):
• Event Counter Mode:TMOD1 and TMOD0=01
C
f o
8 /
4
4
) T
9
5
TMOD1 and TMOD0=00, MR2=1
:TMOD1 and TMOD0=00, MR2=0
:TMOD1 and TMOD0=11
Select clock
Toggle Flip Flop
TAiUD
TAiS
Timer A0 0347
Timer A1 0349
Timer A2 034B
Timer A3 034D
Timer A4 034F
TAi
TMOD1 and TMOD0,
MR2
0
1
Decrement
MR2
Addresses
16
16
16
16
16
0346
0348
034A
034C
034E
01
11
01
00
TMOD1 and TMOD0
16
16
16
16
16
Timer A4 Timer A1
Timer A0 Timer A2
Timer A1 Timer A3
Timer A2 Timer A4
Timer A3 Timer A0
TAj
High-Order Bits of Data Bus
Low-Order Bits of Data Bus
Reload Register
IN
8 low-
order
bits
TAk
and TAi
Always decrement except
in event counter mode
Counter
Increment / decrement
15. Timer (Timer A)
OUT
pin settings
8 high-
order
bits
16
".