M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 306

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
R
R
e
E
3
. v
J
2
0
Figure 22.9 Base Timer Block Diagram
Table 22.3 Base Timer Associated Register Settings
(Also applies when using time measurement function, waveform generating function and communication function)
C
G1BCR0
G1BCR1
G1POCR0
G1BT
Set the following registers to set the RST1 bit to "1" (base timer reset by matching the base timer with the G1PO0 register).
G1POCR0
G1PO0
G1FS
G1FE
1
9
Register
0 .
8 /
B
Apply the Two-Phase
Pulse Signal
0
1
4
0
Matching with
the G1PO0 Register
3
G
J
6
u
o r
0 -
. l
u
0
1
p
, 7
0
Apply "L" to
the INTi Pin
1
(
2
M
BTS Bit
BCK1, BCK0
DIV4 to DIV0
IT
RST2, RST1
BTS
UD1, UD0
BTRE
-
MOD2 to MOD0
-
FSC0
IFE0
0
0
3
(i=0,1)
5
2
f
1
C
10
BCK1 to BCK0
11
8 /
Page 283
Bit
, 4
M
RST1
RST2
3
2
C
f o
8 /
4
Select count source
Select divide ratio of count source
Select the base timer interrupt
Select source for a base timer reset
Used to start the base timer independently
Select how to count
Select source for a base timer reset
Read or write base timer value
Set to "000
Set reset cycle
Set to "0" (waveform generating function)
Set to "1" (channel operation start)
4
) T
9
5
Divider
2(n+1)
Base Timer Reset
2
" (single-phase waveform output mode)
f
BT1
Base Timer
b9
Function
b14 b15
BCK1 and BCK0, IT : Bits in the G1BCR0 register
RST2 to RST0, BTS : Bits in the G1BCR1 register
BTRE : Bit in the G1POCR0 register
1
0
BTRE
1
0
Overflow Signal
22. Intelligent I/O (Base Timer)
IT
(See the BT1R
bit on Figure
11.14)
Base Timer
Interrupt Request