M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 149

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R
R
M
e
E
11.10 Address Match Interrupt
3
. v
J
2
0
Figure 11.12 AIER Register and RMAD0 to RMAD7 Registers
C
The address match interrupt occurs immediately before executing an instruction that is stored into an ad-
dress indicated by the RMADi register (i=0 to 7). The address match interrupt can be set in eight ad-
dresses. The AIERi bit in the AIER register determines whether the interrupt is enabled or disabled. The I
flag and IPL do not affect the address match interrupt.
Figure 11.12 shows registers associated with the address match interrupt.
The starting address of an instruction must be set in the RMADi register. The address match interrupt does
not occur when a table data or addresses other than the starting address of the instruction is set.
1
9
0 .
8 /
B
0
1
4
0
3
G
J
6
u
o r
b23
0 -
. l
Address Match Interrupt Register i
Address Match Interrupt Enable Register
b7
u
0
1
, 7
0
p
b6
1
(
b16 b15
2
M
0
b5
0
3
5
2
b4
C
8 /
Page 126
b3
b8 b7
, 4
b2
M
3
b1
2
b0
C
b0
f o
8 /
Addressing Register for the Address Match Interrupt
4
4
AIER0
AIER1
AIER2
AIER3
Symbol
AIER4
AIER5
AIER6
) T
AIER7
9
Symbol
RMAD0
RMAD1
RMAD2
RMAD3
RMAD4
RMAD5
RMAD6
RMAD7
5
Bit
Symbol
AIER
Address Match
Interrupt 0 Enable Bit
Address Match
Interrupt 1 Enable Bit
Address Match
Interrupt 2 Enable Bit
Address Match
Interrupt 3 Enable Bit
Address Match
Interrupt 4 Enable Bit
Address Match
Interrupt 5 Enable Bit
Address Match
Interrupt 6 Enable Bit
Address Match
Interrupt 7 Enable Bit
Bit Name
Function
Address
0012
0016
001A
001E
002A
002E
003A
003E
0009
Address
(i=0 to 7)
16
16
16
16
16
16
16
16
16
- 0010
- 0014
- 0018
- 001C
- 0028
- 002C
- 0038
- 003C
16
16
16
16
16
16
16
16
0 : Disables the interrupt
1 : Enables the interrupt
0 : Disables the interrupt
1 : Enables the interrupt
0 : Disables the interrupt
1 : Enables the interrupt
0 : Disables the interrupt
1 : Enables the interrupt
0 : Disables the interrupt
1 : Enables the interrupt
0 : Disables the interrupt
1 : Enables the interrupt
0 : Disables the interrupt
1 : Enables the interrupt
0 : Disables the interrupt
1 : Enables the interrupt
After Reset
000000
000000
000000
000000
000000
000000
000000
000000
After Reset
0000 0000
000000
Setting Range
Function
16
16
16
16
16
16
16
16
16
to FFFFFF
2
16
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
11. Interrupts